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00033 #include <types.h>
00034
00039 #define REG_NULL 0
00040
00041
00052 #define REG0_HVCOUNTER 0x2
00053 #define REG0_BASE 0x4
00054 #define REG0_HINT 0x10
00055
00072 #define REG1_BASE 0x4
00073 #define REG1_PAL 0x8
00074 #define REG1_DMA 0x10
00075 #define REG1_VINT 0x20
00076 #define REG1_DISPLAY 0x40
00077
00082 #define REG2_PLANEA(addr) ((addr & 0xE000) >> 10)
00083
00088 #define REG3_WINDOW(addr) ((addr & 0xF800) >> 10)
00089
00094 #define REG4_PLANEB(addr) ((addr & 0xE000) >> 13)
00095
00100 #define REG5_SPRITE(addr) ((addr & 0xFE00) >> 9)
00101
00109 #define REG7_PAL(pal) ((pal & 0x3) << 4)
00110 #define REG7_COLOR(color) (color & 0xF)
00111
00131 #define REG11_HFULL 0x0
00132 #define REG11_H1CELL 0x2
00133 #define REG11_H1LINE 0x3
00134 #define REG11_VFULL 0x0
00135 #define REG11_V2CELL 0x4
00136 #define REG11_EINT 0x8
00137
00151 #define REG12_40CELL 0x81
00152 #define REG12_SHADOW 0x8
00153 #define REG12_INTERLACE 0x2
00154 #define REG12_DINTERLACE 0x6
00155
00160 #define REG13_HSCROLL(addr) ((addr & 0xFC00) >> 10)
00161
00166 #define REG15_AUTOINC(x) x
00167
00196 #define REG16_32X32 0x0
00197 #define REG16_32X64 0x10
00198 #define REG16_32X128 0x30
00199 #define REG16_64X32 0x1
00200 #define REG16_64X64 0x11
00201 #define REG16_64X128 0x31
00202 #define REG16_128X32 0x3
00203 #define REG16_128X64 0x13
00204 #define REG16_128X128 0x33
00205
00255 #define SPRITE_SIZE_8X8 (0x0 << 8)
00256 #define SPRITE_SIZE_8X16 (0x1 << 8)
00257 #define SPRITE_SIZE_8X24 (0x2 << 8)
00258 #define SPRITE_SIZE_8X32 (0x3 << 8)
00259 #define SPRITE_SIZE_16X8 (0x4 << 8)
00260 #define SPRITE_SIZE_16X16 (0x5 << 8)
00261 #define SPRITE_SIZE_16X24 (0x6 << 8)
00262 #define SPRITE_SIZE_16X32 (0x7 << 8)
00263 #define SPRITE_SIZE_24X8 (0x8 << 8)
00264 #define SPRITE_SIZE_24X16 (0x9 << 8)
00265 #define SPRITE_SIZE_24X24 (0xA << 8)
00266 #define SPRITE_SIZE_24X32 (0xB << 8)
00267 #define SPRITE_SIZE_32X8 (0xC << 8)
00268 #define SPRITE_SIZE_32X16 (0xD << 8)
00269 #define SPRITE_SIZE_32X24 (0xE << 8)
00270 #define SPRITE_SIZE_32X32 (0xF << 8)
00271
00291 #define CRAM_WRITE 0x3
00292 #define CRAM_READ 0x8
00293 #define VRAM_WRITE 0x1
00294 #define VRAM_READ 0x0
00295 #define VSRAM_WRITE 0x5
00296 #define VSRAM_READ 0x4
00297
00308 #define DMA_TO_VRAM 0x1
00309 #define DMA_TO_CRAM 0x3
00310 #define DMA_TO_VSRAM 0x5
00311
00323 #define VDP_BUILD_TILE(n, vflip, hflip, pal, shadow) \
00324 (n | (vflip << 11) | (hflip << 12) | (pal << 13) | (shadow << 15))
00325
00332 void vdp_pointto(u32 addr, u8 access);
00333
00340 void vdp_setreg(u32 reg, u32 data);
00341
00347 void vdp_write(u16 data);
00348
00354 void vdp_write16(u16 data);
00355
00361 void vdp_write32(u32 data);
00362
00370 void vdp_writetocram(u8 size, const void *src, u8 dst);
00371
00379 void vdp_writetovram(u16 size, const void *from, u16 dst);
00380
00388 void vdp_writetovsram(u16 size, const void *from, u16 dst);
00389
00398 void vdp_dma(u16 size, const void *from, u16 dst, u8 region);
00399
00407 void vdp_dmafill(u16 size, u16 dst, u16 data);
00408
00413 void vdp_waitdma(void);
00414
00421 void vdp_clrvram(void);
00422
00429 void vdp_clrvsram(void);
00430
00435 void vdp_waitvsync(void);